Voltage multiplier for an electronic time apparatus
US4068295A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 6, 1976 |
| Grant date | Jan 10, 1978 |
| Priority date | — |
| Expiry date | Jul 6, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04G19/04
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A voltage multiplier for an electronic time-measuring apparatus comprising cells, each of which including two capacitors, a pair of complementary field-effect transistors (FET'S) acting as switches, and an inverter comprising a pair of FET'S. The elements of the cells are such that they are capable of being integrated together with the rest of the circuit of the time-measuring apparatus. The voltage to be increased is fed via a first capacitor to the first pair of FETS'S and at the same time to the input of the inverter whose output drives with the correct phase the first pair of FETS'S, which alternatively switches the input signal to a common point of the cell and to an output terminal of the cell, thus charging a second capacitor with the opposite polarity than that of the input signal respective to the common point of the cell. In order for the input voltage to be further increased, the cells can be cascaded in a chain, the common point of one cell being connected to the output terminal of the preceding cell. Each cell will add to the preceding one an amount of voltage equal to that of the input voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.