Pulse error detector
US4070646A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 25, 1976 |
| Grant date | Jan 24, 1978 |
| Priority date | — |
| Expiry date | Jun 25, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/247
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An error detector for received pulses, which pulses normally alternately extend in opposite directions. An up-down counter has first, second, third and fourth sequential states. Means is provided for forming an error signal when the counter is in either the first or fourth state. Means is provided for resetting the counter to one of the second and third states after the counter reaches either the first or fourth state. Means is provided for receiving the pulses and for causing the counter to count up a state responsive to a pulse of one direction and for causing the counter to count down a state responsive to a pulse of the other direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.