Data packets distribution loop
US4071706A · kind A · utility
31Cited by
7References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 13, 1976 |
| Grant date | Jan 31, 1978 |
| Priority date | — |
| Expiry date | Sep 13, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/422
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A data communications or distribution loop has a plurality of computer stations each of which introduces a delay while it examines the header of each circulating packet or block of data. An elastic synchronizing buffer, including a random-access memory, is included in the loop to introduce a delay which, when added to the delays introduced by the stations, equals the period of a packet. The delay introduced by the buffer is automatically adjusted as stations are added to, or removed from, the loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.