Broadcast receiver tuning circuit with station memory
US4075567A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 1976 |
| Grant date | Feb 21, 1978 |
| Priority date | — |
| Expiry date | Dec 21, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J5/0245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A tuning circuit for a high frequency receiver in which the received frequency is determined by a voltage-controlled oscillator, the present tuning frequency is indicated by a counter connected to the oscillator and producing a representation of each digit of the decimal number identifying the current received frequency, representations of the digits of the number identifying the desired received frequency are fed in via a keyboard and stored in a dynamic memory having a feedback connection from its last memory cell to its first memory cell, the decimal number representations are compared in a comparator to produce a control voltage that brings the oscillator frequency to the desired value, the comparator being capable of comparing only one digit of the number representations at a time and being associated with multiplex circuitry which supplies the digits of corresponding significance thereto in sequence, starting with the most significant digit, and a station tuning memory is provided to store representations of the frequency and band of selected broadcast stations and is connected by a linkage circuit to the dynamic memory to permit transfer in either direction between the memor…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.