Self-aligned gate field effect transistor and method for making same
US4077111A · kind A · utility
10Cited by
5References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1976 |
| Grant date | Mar 7, 1978 |
| Priority date | — |
| Expiry date | Jul 14, 1996 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/143
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A self-aligned gate field effect transistor is described which is capable of operating at high frequencies. A method for making the transistor is described which comprises plating metal partially over an oxide layer, then removing the oxide to produce an overlapping metal portion and then plating again to produce a gate contact between the overlapping metal portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.