Data processing system with improved read/write capability
US4079354A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 9, 1977 |
| Grant date | Mar 14, 1978 |
| Priority date | — |
| Expiry date | Mar 9, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4213
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described is a data processing system with an improved data processing operation which is comprised of a central processing unit, a main memory unit, a plurality of input/output control units and a common bus which interconnects all of the above units, wherein the common bus includes at least a data channel, an address channel and a tag channel. The tag channel consists of at least a "write service in" line and a "read service in" line, wherein the "write service in" line transfers a signal which indicates, when the write operation is being conducted, whether or not the information on the data channel and the address channel are available, while the "read service in" line transfers a signal which indicates, when the read operation is being conducted, whether or not the information on the address channel is available, whereby a write operation and a read operation are alternately specified in the system without errors. Further, a single means for providing a bus busy signal is mounted in the system. After one of the data processing unit or input/output control units has requested to occupy the common bus for carrying out the write operation or for carrying out the read operation, an…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.