Word, byte and bit indexed addressing in a data processing system
US4079451A · kind A · utility
36Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 7, 1976 |
| Grant date | Mar 14, 1978 |
| Priority date | — |
| Expiry date | Apr 7, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system for providing word, byte or bit addressing. A word location in a memory device may be addressed based upon the contents of a base address register. Indirect addressing may be provided to another word location based upon a word index value in an index register. Effective byte or bit addressing of the addressed word is provided in response to byte and bit index values which are produced by means of the index register. An instruction word indicates the type of addressing and directs the use of different control words included in a control storage device in order to implement the desired operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.