Patent · US Expired

Monolithically integrated semiconductor circuit arrangement

US4081792A · kind A · utility

11Cited by

4References

10Claims

0Family size

Assignee

Licentia Patent-Verwaltungs-GmbH · DE

Inventors

Hans Schussler · Bad Marienberg, DE
Hans-Jurgen Wulf
Bernhard Rall · Ulm, DE
Helmut Knapp · Ebikon, CH

Key dates

Filing date	Mar 26, 1976
Grant date	Mar 28, 1978
Priority date	—
Expiry date	Mar 26, 1996

Classification

Technology area (CPC H)Electricity
CPC primaryH04Q3/521
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

A monolithically integrated semiconductor matrix circuit arrangement comprising switching elements which are connected in pairs at one terminal. This common terminal of the pair of switching elements is connected to an input (or output) circuit path and other terminal of each switching element is connected individually to an output (or input) circuit path respectively.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.