Dual slope integration circuit
US4082998A · kind A · utility
23Cited by
2References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 14, 1977 |
| Grant date | Apr 4, 1978 |
| Priority date | — |
| Expiry date | Mar 14, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/406
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit for performing dual slope integration to provide a digital measurement of an input voltage of either positive or negative polarity employs a single source of reference potential in combination with a switchable resistive network as a source of reference current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.