Digital monitor having memory readout by the monitored system
US4084262A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 1976 |
| Grant date | Apr 11, 1978 |
| Priority date | — |
| Expiry date | May 28, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0763
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital monitor for monitoring the operation of a synchronous digital system. Proper operation of the monitored digital system is determined by storing a predetermined sequence of digital numbers in a memory. The bit patterns generated by the system being monitored are utilized as addresses to read the stored digital numbers. After each read cycle the digital number read from the memory is examined to determine if it has the proper value. If the value is not proper, a memory is set indicating that the system being monitored has malfunctioned. Additionally, the number of bit patterns checked during each cycle of the system is determined. If the correct number of patterns are not checked, the memory is also set indicating that a malfunction has occurred. Apparatus for monitoring a selected number of analog signals such as power supply voltages is also provided. Either of these tests may be inhibited by signals from the system being monitored or by signals from an external source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.