Carrier lock detector
US4087628A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1976 |
| Grant date | May 2, 1978 |
| Priority date | — |
| Expiry date | Oct 13, 1996 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Apparatus for indicating a phase lock condition between an incoming multiphase carrier signal and a local oscillator in a phase-locked loop demodulator. A phase error signal is generated by phase comparing the carrier signal and the local oscillator signal. The phase error signal is rectified and the result detected for a range of values that indicate a phase lock condition. Phase lock exists when the phase error signal is within selected voltage ranges. After detection, the error signal is low-pass filtered and compared to a predetermined threshold value to generate a phase-lock indication signal. In the last two steps, an indication signal is generated to signify that the phase error signal is in the range of voltage values corresponding to phase lock for a greater percentage of time than it is within this range with the loop is not phase locked.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.