Data processing system
US4089052A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 1977 |
| Grant date | May 9, 1978 |
| Priority date | — |
| Expiry date | Jun 6, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system having at least one memory module and at least one data accessing control unit, wherein the data accessing control unit provides a first memory control signal for requesting a start of a memory module and a second memory control signal for preventing a start thereof. Each memory module includes means responsive to the first and second memory control signals and to a busy signal generated by the module, for starting the module when the state of the busy signal indicates the module is not currently in operation and the state of the second memory control signal indicates the module is not to be prevented from starting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.