Monolithic integrated circuit device construction methods
US4089103A · kind A · utility
3Cited by
3References
52Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 4, 1976 |
| Grant date | May 16, 1978 |
| Priority date | — |
| Expiry date | Jun 4, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28525
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for monolithic integrated circuit construction are presented wherein component device-isolating region self-alignment is provided and also, where an element of the device is provided through independent dopant provision steps to allow design flexibility in providing that device element and associated integrated circuit devices. The method is especially applicable to bipolar device construction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.