Timing signal generator circuit
US4090096A · kind A · utility
276Cited by
9References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 29, 1977 |
| Grant date | May 16, 1978 |
| Priority date | — |
| Expiry date | Mar 29, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A timing signal generator includes a field-effect transistor having a drain supplied with a command signal and a source connected to an output node. The gate of the transistor is connected to a circuit node which is precharged to a voltage to render the transistor conductive prior to the activation of the command signal. A delay circuit having a predetermined delay time has an input connected to the output node and an output connected to a circuit for discharging the output node and the circuit node in response to the output of the delay circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.