Silicon oxide/silicon nitride mask with improved integrity for semiconductor fabrication
US4091169A · kind A · utility
19Cited by
9References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1976 |
| Grant date | May 23, 1978 |
| Priority date | — |
| Expiry date | Sep 7, 1996 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/25
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor dielectric layer formed of silicon nitride having a uniform dispersion of carbon therein for providing reduced intrinsic tensile stresses of less than 10 .times. 10.sup.9 dyn/cm.sup.2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.