Manufacturing process for the collective production of semiconductive junction devices
US4097986A · kind A · utility
6Cited by
4References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1976 |
| Grant date | Jul 4, 1978 |
| Priority date | — |
| Expiry date | Dec 9, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/4871
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process intended for combining the "flip-chip bonding" technique with a method yielding diodes of very thin substrate forming mesa units or clumps etched out in a dielectric block embedding the semiconductor body. The process comprises, starting from a semiconductive wafer, a double mesa etching and a double lapping, each of them carried out on each side of the wafer, due to a thick dielectric layer and a thick metallic support respectively brought in at the right moment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.