MOS reference voltage circuit
US4100437A · kind A · utility
66Cited by
8References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 29, 1976 |
| Grant date | Jul 11, 1978 |
| Priority date | — |
| Expiry date | Jul 29, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/245
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An MOS integrated circuit for providing a stable reference voltage. The voltage thresholds of an enhancement mode transistor and depletion mode transistor are substracted to provide the stable reference potential. The reference potential is stable for both temperature and power supply variations, including variations in a substrate biasing potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.