CPU/Parallel processor interface with microcode extension
US4104720A · kind A · utility
34Cited by
3References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 29, 1976 |
| Grant date | Aug 1, 1978 |
| Priority date | — |
| Expiry date | Nov 29, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a data processing system which employs parallel processors (PP's or P--P's) that are interfaced to the CPU, and which derive their control from microinstructions stored in an extension to the CPU microcode structure. This extension forms part of the CPU/PP interface. The P--P's increase speed of operation of the data processing system in which they are employed by operating synchronously and simultaneously with the CPU when called upon by CPU microcode structure to execute particular algorithms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.