RMS circuit
US4109165A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 1977 |
| Grant date | Aug 22, 1978 |
| Priority date | — |
| Expiry date | Feb 14, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G7/002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An RMS circuit comprising a logarithmic amplifying circuit, a fullwave rectifying circuit for subjecting an output from the logarithmic amplifying circuit to fullwave rectification, and a smoothing circuit for smoothing an output signal from the fullwave rectifying circuit, wherein the logarithmic amplifying circuit is provided with an operational amplifier whose noninverting input terminal is grounded and whose inverting input terminal is connected to a signal source; a first npn transistor whose collector is connected to the inverting input terminal of the operational amplifier and whose base is grounded; a first diode whose anode is connected to the emitter of the first npn transistor and whose cathode is connected to the output terminal of the operational amplifier; a second diode whose anode is connected to the output terminal of the operational amplifier; and a third diode whose anode is connected to the cathode of the second diode and whose cathode is connected to the noninverting input terminal of the operational amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.