Semiconductor memory read/write access circuit and method
US4112512A · kind A · utility
20Cited by
3References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1977 |
| Grant date | Sep 5, 1978 |
| Priority date | — |
| Expiry date | Dec 22, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high performance semiconductor memory read/write data access circuit including a sense amplifier directly coupled to a pair of bit lines is provided with a pair of bit switching devices to enable data communication external to the memory. Control potentials and timing of switching signals are provided in such a manner that only one of the bit switches becomes conductive during reading and writing access to the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.