Phase lock speed-up circuit
US4115745A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 4, 1977 |
| Grant date | Sep 19, 1978 |
| Priority date | — |
| Expiry date | Oct 4, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention concerns a circuit which decreases the time required for certain phase-locked loops to pull in, that is, the time for the frequency of the oscillator which the loop controls to go from some initial error to some specified smaller error. The circuit is utilized with a loop employing an integrating element in the loop filter in conjunction with a logic circuit for indicating out-of-lock condition plus the sign of the frequency error and utilizes a source of direct current (DC) which is connected to the loop filter so as to increase the rate of change of the correction signal to the controlled oscillator and thereby speed-up tuning of the oscillator to the desired frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.