Channel bus controller
US4115854A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1977 |
| Grant date | Sep 19, 1978 |
| Priority date | — |
| Expiry date | Mar 28, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/122
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The Channel Bus Controller (CBC) transfers information between groups of input/output channels and processor storage. Storage receives or dispenses two data words per access operation. Interfaces for transfers from the channel groups to the CBC are advantageously one word wide; since each output (fetch) request consists of a single request word. Information sent by each group is assembled into three-word units (a request word and zero, one or two data words) in a respective channel bus assembly register (CBAR). The assembled unit is passed from the CBAR to a respective area of an In Buffer array and from that array to storage. Zero filler words are inserted into unused data word positions. A channel request may be tagged to designate a transfer of four data words. If the transfer is an input the four data words are sent to the CBC with a single request word. The third and fourth data words are written in the CBAR over the first and second data words as (or after) the unit formed by the request and first and second data words is advanced to the In Buffer. The same request and the third and fourth data words are transferred as a second unit from the CBAR to the In Buffer. The low ord…
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