Amorphous semiconductor memory device for employment in an electrically alterable read-only memory
US4115872A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 31, 1977 |
| Grant date | Sep 19, 1978 |
| Priority date | — |
| Expiry date | May 31, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/882
Abstract
This disclosure relates to an electrically alterable amorphous memory device which can be switched from a high resistance state to a low resistance crystalline state. The device has increases in the concentration of those particular elements at the electrodes to which the respective constituents would migrate during a large number of set-reset cycles. This lessens the decline in the threshold voltage caused by the electromigration of those constituents. There is disclosed a layered structure in which a layer rich in one appropriate constituent is placed between the amorphous memory material layer and the respective electrode and another layer of material rich in the other constituent is placed between the amorphous material and the other electrode. Specifically, there is disclosed a tellurium based chalcogenide as the memory layer. A layer of substantially tellurium is placed between the amorphous memory layer and the positive electrode while the layer of germanium and tellurium in a ratio of approximately 1:1 is placed between the amorphous material and the negative electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.