Digital to analog converter with binary and binary coded decimal modes
US4118699A · kind A · utility
6Cited by
2References
27Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 14, 1977 |
| Grant date | Oct 3, 1978 |
| Priority date | — |
| Expiry date | Feb 14, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1014
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital to analog converter with bit circuits arranged in binary order, in which a supplemental current circuit is added to selected bit circuits to enable convenient and efficient conversion from binary to BCD operation. Supplemental BCD currents are controlled by a bias circuit which automatically increases the BCD bit circuit bias to a level at which the full-scale BCD output current is substantially equal to the full-scale binary output current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.