Optically coupled bias circuit for complementary output circuit and method
US4121168A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 24, 1977 |
| Grant date | Oct 17, 1978 |
| Priority date | — |
| Expiry date | Aug 24, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/3072
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A complementary transistor output circuit and method incorporates an optical coupler including a light emitting diode and a phototransistor connected between the base electrodes of a complementary pair of output transistors including a PNP transistor and an NPN transistor. The emitter of each of the output transistors is connected to an output of the output circuit. The base electrodes of the PNP output transistor and the NPN output transistor are connected, respectively, to first and second current source circuits. The collector electrode of the NPN output transistor is coupled by means of a first feedback circuit including a first resistor and a PNP transistor to the anode of a light emitting diode. The collector electrode of the PNP output transistor is coupled by means of a second feedback circuit to include a second resistor and an NPN transistor to the cathode of the light emitting diode. A phototransistor operates to effectively shunt base drive current supplied by the two current source circuits to the PNP and NPN output transistors to establish a bias voltage, and to maintain a constant quiescent bias current through the output transistors. The magnitude of the quiescent b…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.