Buffer amplifier circuit suitable for manufacture in monolithic integrated circuit form
US4122402A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 5, 1977 |
| Grant date | Oct 24, 1978 |
| Priority date | — |
| Expiry date | Jul 5, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A buffer amplifier suitable for being driven by a differential amplifier having a differential-to-single ended converter is disclosed. The buffer amplifier includes a multi-collector input transistor of a first conductivity type and an emitter-follower output transistor of a second conductivity type. The base of the output transistor is connected to a first collector of the input transistor. A bias circuit for the output transistor is connected to the first collector of the input transistor and to the base of the output transistor. A negative feedback network is connected between the emitter of the output transistor and the base and second collector of the input transistor to stabilize the quiescent output voltage. Current sources are utilized for maximizing the amplitude of the dynamic output voltage and for facilitating temperature independence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.