Error detection and indication system for bi-phase encoded digital data
US4122441A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1977 |
| Grant date | Oct 24, 1978 |
| Priority date | — |
| Expiry date | Oct 5, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4904
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A real-time error detection system for bi-phase or similarly encoded digital data is disclosed. Bi-phase or similarly encoded data, which utilizes two transitions in a bit cell for either a binary "1" or a binary "0" value, and one transition in a bit cell for the other binary value inherently generates an even number of transitions of the binary value represented by the two transitions between the occurrence of the other binary value represented by one transition. Monitoring for the number of transitions of the binary value represented by two transitions provides an indication of the occurrence of an odd number of transitions. This represents an error condition. The system utilizes a logic circuit responsive to the binary "1" and binary "0" data clock retrieved from the self-clocking bi-phase encoded data. When an error condition is detected, an error indicating signal is generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.