Disturbing signal detection circuit
US4124819A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 14, 1977 |
| Grant date | Nov 7, 1978 |
| Priority date | — |
| Expiry date | Mar 14, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/16
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A signal being received and superimposed disturbance pulses are taken from a stage of the receiver where the signal is a periodic wave of constant amplitude or of amplitude varying at rates limited by a moderate modulation band, and the signal so picked up is AC-coupled to a diode clamp circuit, the clamp voltage then being amplified to produce a control output for a blanking gate. The forward voltage of the diode is insufficient to put the transistor of the following amplifier into its conducting condition, so that the transistor conducts only when a disturbance pulse extends beyond the limits of the envelope of the sinusoidal signal. By the use of a phase splitter, two identical clamp circuits may be operated to detect disturbance pulses of opposite polarity, and their outputs may be combined to provide blanking control pulses whenever a disturbance pulse of either polarity appears.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.