Charge-coupled devices
US4125818A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 1976 |
| Grant date | Nov 14, 1978 |
| Priority date | — |
| Expiry date | Nov 16, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D44/472
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A charge-coupled analogue delay line has a plurality of analogue storage locations, and a gating means, which may include charge-coupled shift register, for enabling input to and output from each of the storage locations in turn. The storage locations are formed on a semiconducting substrate and each has a diffused zener diode to act as a source of minority carriers and a priming electrode for drawing off and holding a charge of minority carriers from the zener diode. A sample-holding electrode, upon receipt of a gating signal by a gating electrode, receives from the priming electrode and holds a charge of minority carriers of magnitude indicative of the magnitude of the signal to be stored. An output electrode is arranged to transfer the charge held by the sample-holding electrode to a diffused output channel. Since signal samples in this delay line are transferred just once into a storage location and then out again they suffer less from degradation due to residual charges then is the case in conventional CCD delay lines in which samples are passed from location to location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.