Integrated semiconductor crosspoint arrangement
US4125855A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1977 |
| Grant date | Nov 14, 1978 |
| Priority date | — |
| Expiry date | Mar 28, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Symmetrical integrated transistors and drive circuitry provide low loss bilateral analog crosspoints for a switching matrix. Each crosspoint comprises a high performance PNP lateral transmission switching transistor and an associated NPN vertical drive transistor formed over a common n-type buried tub in a p-type substrate. Individual crosspoints, including the transmission transistor and the drive circuitry, are isolated by means of frame shaped p-type isolation regions lying outside the buried tub. The collector of the NPN drive transistor and the base of the PNP transmission transistor are ohmically connected by means of the buried tub. Accordingly, although the transmission transistor and the drive transistor are merged in a single isolation region, current drive to the PNP transistor is by means of the NPN transistor as a functionally independent device. The lateral PNP transistor comprises stripe shaped emitter and collector electrodes which are formed in a single step with the isolation region and the electrodes are of equal doping, size, and shape. Pluralities of such emitters and collectors which are respectively interconnected by surface metallizations may be utilized to …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.