High speed data shifter array
US4128872A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 20, 1977 |
| Grant date | Dec 5, 1978 |
| Priority date | — |
| Expiry date | Jun 20, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high speed digital data shifter capable of processing a plurality of parallel data bits and comprising a plurality of programmable data shifters arranged in an array. The plurality of programmable data shifters each have shift function select inputs, scale factor inputs, and a sign bit input and are capable of shifting data right, shifting data left, rotating data right, rotating data left, shifting using two's complements, and forcing the output to a predetermined logic level. The high speed array is capable of shifting data and of rotating data right and left. A plurality of scale factor terminals are provided for receiving scale factor commands. The scale factor terminals are coupled to the programmable data shifters for controlling the number of positions that data is shifted by each programmable data shifter. A plurality of logic gates receive and decode shift select function commands. Outputs of the plurality of logic gates are coupled to the programmable data shifters to provide shift function controls.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.