Wafer packaging system
US4129211A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1976 |
| Grant date | Dec 12, 1978 |
| Priority date | — |
| Expiry date | Sep 7, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67386
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer packaging system for clean packaging and damage-free transporting of semiconductor wafers. The system includes tubular outer and inner containers, the inner container adapted to be contained by the outer container with the longitudinal axes of both containers extending in the same axial direction. The inner container includes provision for holding a plurality of the semiconductor wafers in spaced face-to-face relationship. The system provides a sealed container arrangement preventing contaminants outside the outer container from contaminating wafers within the inner container. Shock-absorbing features associated with the containers prevent shocks applied to the outer container from damaging the wafers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.