Method for manufacturing monolithic semiconductor mask programmable ROM's
US4129936A · kind A · utility
Inventor
Key dates
| Filing date | Sep 8, 1977 |
| Grant date | Dec 19, 1978 |
| Priority date | — |
| Expiry date | Sep 8, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing ROM's composed of a plurality of matrix-arranged IGFET's comprises a process for manufacturing a semiconductor device with no information yet written therein and a process for completing the ROM by writing predetermined information or memory in the no-information semiconductor device according to orders from users. The no-information semiconductor device may be produced by first forming a plurality of relatively thick rectangular oxide layers with a predetermined length, for separating the IGFET's, in parallel with one another on a substrate, then covering the whole surface of the substrate with a gate oxide layer and forming on such gate oxide layer a plurality of selective lines composed of polycrystalline silicon extending in parallel with one another across the separating oxide layers, removing the gate oxide film in regions surrounded by the selective lines and the separating oxide layers, and finally diffusing an impurity in the substrate by the thermal diffusion method to form a plurality of strip-shaped source regions and square drain regions. In storing memory in such no-information semiconductor device to complete the ROM, the whole surface of t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.