Fabrication of small contact openings in large-scale-integrated devices
US4136434A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 1977 |
| Grant date | Jan 30, 1979 |
| Priority date | — |
| Expiry date | Jun 10, 1997 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/949
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a relatively thin layer of polysilicon is deposited on an underlying region to which spaced-apart electrical contacts are to be made through a subsequently formed relatively thick insulating layer. The polysilicon is selectively masked by a patterned silicon nitride layer in the regions where contact windows are to be formed. The unmasked polysilicon is then converted to a relatively thick insulating layer in an oxidizing step. Thereafter the silicon nitride portions are removed and the remaining polysilicon is utilized to provide conductive regions in the defined windows. In another embodiment, a relatively thick layer of polysilicon is selectively masked and partially converted to silicon dioxide to define both the insulating layer and the conductive regions. In still another embodiment, a relatively thin layer of polysilicon is patterned and then entirely converted to silicon dioxide to form an insulating layer having windows defined therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.