False framing detector
US4142070A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1977 |
| Grant date | Feb 27, 1979 |
| Priority date | — |
| Expiry date | Dec 27, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0605
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A framing circuit for a pulse code modulated, time multiplexed data receiver provides terminal framing by first detecting a predetermined terminal frame bit code and then checking for false framing by utilizing a false framing detector to count the number of times a particular pattern in a signaling frame bit code occurs. The false framing detector is enabled after terminal framing of the receiver has been accomplished. The false framing detector thereby provides a cross-check between the terminal frame code and the signaling frame code to assure that the receiver has not erroneously framed on a 2 khz interference tone. The cross-check occurs during data reception after terminal framing so that the false frame detector does not delay reframing under ordinary circumstances.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.