Integrated circuit with threshold regulation
US4142114A · kind A · utility
79Cited by
8References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 18, 1977 |
| Grant date | Feb 27, 1979 |
| Priority date | — |
| Expiry date | Jul 18, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/145
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Threshold voltage regulation of field-effect transistors on a common substrate of an integrated circuit is achieved by adjusting the back bias on the substrate using a charge pump that is selectively operated whenever the threshold voltage of a designated enhancement mode FET falls below a reference voltage. A voltage divider provides the reference voltage that is applied to the gate of the enhancement mode FET, which when turned-on enables the charge pump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.