Multiplier accumulator
US4142242A · kind A · utility
10Cited by
1References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 10, 1977 |
| Grant date | Feb 27, 1979 |
| Priority date | — |
| Expiry date | Nov 10, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3856
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Multiplier accumulator device for performing the algebraic sum .SIGMA. .+-. A.sub.i B.sub.i of products of n-bit operands expressed in two's complement form. The accumulator is divided in two n-position halves, and the rightmost position of the accumulator is linked to the leftmost position. The product partial sums are alternately accumulated into the left and right halves in such a manner that partial products of like weight are added together. Each position of the accumulator is an adding cell except the leftmost positions of the right and left parts which are subtractive cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.