Small digital time division switching arrangement
US4143241A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 1977 |
| Grant date | Mar 6, 1979 |
| Priority date | — |
| Expiry date | Jun 10, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2213/13292
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a small digital time-division switching arrangement capable of interfacing with a plurality of PCM communication lines on one side and a separate plurality of transmission channels on the other side. A first processor primarily tracks call progress by scanning signalling bits indicating on/off hook state changes and a second processor controls the action of a time slot interchanger which both assembles and disassembles channel data and telemetry messages and establishes and breaks down calls while connecting appropriate service circuits to the communication lines during the progress of a call. The processors are implemented with separate microprocessor chips and associated memory and the switching arrangement can simultaneously communicate with a variety of call originating circuits employing a wide variety of control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.