Patent · US Expired

Technique for obtaining symbol timing for equalizer weights

US4146840A · kind A · utility

19Cited by
5References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 31, 1978
Grant dateMar 27, 1979
Priority date
Expiry dateJan 31, 1998

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L7/0058
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

An equalizer-dependent timing recovery system monitors the equalizer weighting coefficient pattern over the entire time span of the equalizer, and differential changes at opposite ends of the pattern are used as a basis for adjusting the receiver symbol timing clock. The magnitudes of a plurality of equalizer weighting coefficients at the beginning of the equalizer are summed and the total is compared with the summed magnitudes of a plurality of equalizer weighting coefficients at the end of the equalizer. Depending upon the sign of the difference between the two totals, the phase (or frequency) of the receiver symbol clock will be adjusted so as to shift the equalizer weighting coefficient pattern in a direction such that the magnitude of the weights at both ends of the equalizers are approximately the same. Circuitry for implementing the above scheme includes a pair of adders coupled to sets or plural weighting coefficient stages for opposite ends of the equalizer. The outputs of these adders are applied to a subtractor or difference circuit and the sign of the result is controllably gated to an add/delete pulse circuit, which controllably increases or decreases the frequency of …

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.