Fixed speech buffer memories for signalling without an order wire
US4147896A · kind A · utility
2Cited by
4References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1977 |
| Grant date | Apr 3, 1979 |
| Priority date | — |
| Expiry date | Dec 23, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/04
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In a time assignment speech interpolation system, a fixed delay between the input speech channel and the transmission facility provides time to generate and transmit a symbol representing the speech channel to which the transmission facility has been assigned. At the remote location, a fixed delay between the transmission facility and the output speech channel provides time in which to detect the symbol and perform the necessary switching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.