Automatic overlay measurements using an electronic beam system as a measurement tool
US4149085A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 1978 |
| Grant date | Apr 10, 1979 |
| Priority date | — |
| Expiry date | Jan 16, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/3045
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method and apparatus is described for performing automatic overlay measurements on wafers utilized in semiconductor manufacturing. The overlay measurements are made at selected sites on a given wafer where a single bar pattern has been overlaid over a double bar pattern. The position of the single bar center line with respect to the center line between the double bars is a direct indication of the overlay error of the two patterns. The overlay error is measured in both the X and Y dimensions and is utilized to monitor the overlay error or to produce statistics and correlations to system parameters so that the sources of overlay errors may be identified and the errors eliminated or minimized on subsequent wafers being processed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.