Frequency synthesizer for transmitter receiver using a phase locked loop
US4149125A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Dec 2, 1976 |
| Grant date | Apr 10, 1979 |
| Priority date | — |
| Expiry date | Dec 2, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/405
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer for use in a transmitter/receiver, comprising a voltage controlled oscillator, a programmable frequency divider for dividing the frequency of the output from the voltage controlled oscillator, a reference oscillator, a reference counter for dividing the frequency of the output from the reference oscillator, a phase detector for phase detecting the frequencies of the reference counter and the frequency divider for providing a control voltage to said voltage controlled oscillator, a transmitting/receiving mode selection circuit for selectively controlling the programmable frequency divider such that the frequency division rate thereof is different in the transmitting and receiving modes, a channel designating circuit, a first output terminal for withdrawing an output by mixing the output from the voltage controlled oscillator with the output from the reference oscillator, and a second output terminal for directly withdrawing the output from the voltage controlled oscillator, said transmitting/receiving mode selection circuit comprising a transmitter/receiver selection switch, and full adder means or a read only memory for storing in advance information concern…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.