Method of manufacturing a semiconductor device
US4151006A · kind A · utility
15Cited by
8References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1977 |
| Grant date | Apr 24, 1979 |
| Priority date | — |
| Expiry date | Apr 19, 1997 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/02
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device having a transistor structure in which the emitter zone comprises a lower-doped region adjoining the base zone and a more highly-doped region adjoining the surface. According to the invention, the more highly-doped part is obtained by the introduction of doping atoms through an undoped polycrystalline layer provided on the surface. Preferably, a thin silicon nitride or silicon oxide layer is provided between the surface and the polycrystalline silicon layer prior to providing the latter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.