Parallel run-length decoder
US4152697A · kind A · utility
14Cited by
5References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 11, 1976 |
| Grant date | May 1, 1979 |
| Priority date | — |
| Expiry date | Aug 11, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/42
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
System and method for parallel decoding of character data in run length format to produce data in dot matrix form for presentation to a display device. The data for successive runs is stored in registers and processed in parallel to provide address data for memory devices programmed to deliver predetermined output data patterns in response to the address data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.