Multiplex data processing system
US4153934A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 27, 1977 |
| Grant date | May 8, 1979 |
| Priority date | — |
| Expiry date | Jan 27, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4818
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The multiplex data processing system comprises a plurality of data processing units connected to form a non-hierachical structure, a shared memory device commonly used by the plurality of data processing units and a job registration unit accessable to the shared memory device for causing the plurality of data processing units to execute their interrupting services. The job registration unit includes circuit means for storing a plurality of job service requests for judging the order of priority of the job service requests, for generating an address signal, and for generating a read/write signal and interruption signal. The shared memory device comprises destructive reading memory cells, a circuit for judging the order of priority of the job service request sent from the job registration unit and the job service request transmitted from the data processing units, and a circuit controlling the READ/WRITE signals sent from the job registration unit and the data processing units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.