Method and arrangement for the redundancy-reducing coding of pictures
US4155097A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 18, 1977 |
| Grant date | May 15, 1979 |
| Priority date | — |
| Expiry date | Aug 18, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/527
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
With known methods for predictive decorrelation it always applies only to one or more previously scanned elements of the same picture line. A disturbance for a decorrelated value leads on reconstruction to a "falsification" of a longer picture sequence. A protection from errors by check bits for each decorrelated element would considerably increase the redundancy. In accordance with the invention the picture to be scanned is divided into sub-pictures and in each sub-picture some substantially uniformly distributed elements are decorrelated as supporting positions and transmitted faultlessly, the remaining intermediate elements being decorrelated only with respect to the supporting positions of the sub-picture and transmitted without protection against errors. Consequently, the increase in redundancy by means of check bits is limited and an error with a transformed value of an intermediate element disturbs on reconstruction only that intermediate element itself and not the surrounding elements. With an arrangement for the decorrelation a number of picture lines corresponding to the number of lines a sub-picture comprises is intermediately stored and two processing circuits are conne…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.