Apparatus and method for controlling microinstruction sequencing by selectively inhibiting microinstruction execution
US4155120A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 1977 |
| Grant date | May 15, 1979 |
| Priority date | — |
| Expiry date | Dec 1, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/265
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprogrammed digital computer employing a plurality of programmable read only memories containing stored control words which are specially chosen so as to provide for microinstruction sequencing in a manner which in the first instance assumes that no branching possibilities are present, even though one or more branching possibilities may in fact be present in the microinstruction flow path. The correctness of microinstruction sequencing is monitored concurrently with the execution of a microinstruction during each cycle for which a branching decision is required. When an incorrect assumed sequence is detected, correction is provided using microinstruction indexing and inhibiting signals which are selectively provided in response to the states of selected system conditions during the cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.