Method and circuit arrangement for sequencing microinstruction sequences in data processing equipment
US4156900A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 1977 |
| Grant date | May 29, 1979 |
| Priority date | — |
| Expiry date | Apr 18, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/265
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for sequencing microinstruction sequences in data processing equipment in which during the course of a primary sequence subroutine jumps are performed and subsequences are carried out and at the end of each, a return jump into the primary sequence takes place due to the control provided by a temporarily stored return jump address at a point in the sequence at which a two-part branching instruction is to be evaluated. The first part of the branching instruction characterizes a branching function which is to be carried out dependent on a decision which is specified in the second part thereof. The circuit includes a microinstruction storage from which microinstruction sequences are taken over depending upon the output signals from a central fixed-cycle control circuit fed into a microinstruction register and a recoder which is arranged thereafter. The central fixed-cycle control circuit feeds into the microinstruction register, through a control signal which characterizes a return jump, a first output signal for maintaining the return jump instruction stored in the microinstruction register and a second output signal for the additional taking over of the branching instructio…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.