Superconducting transistor
US4157555A · kind A · utility
25Cited by
6References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 7, 1977 |
| Grant date | Jun 5, 1979 |
| Priority date | — |
| Expiry date | Nov 7, 1997 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S505/874
Abstract
A superconducting transistor is formed by disposing three thin films of superconducting material in a planar parallel arrangement and insulating the films from each other by layers of insulating oxides to form two tunnel junctions. One junction is biased above twice the superconducting energy gap and the other is biased at less than twice the superconducting energy gap. Injection of quasiparticles into the center film by one junction provides a current gain in the second junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.