Accessing arrangement for memories with small cells
US4160275A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 1978 |
| Grant date | Jul 3, 1979 |
| Priority date | — |
| Expiry date | Apr 3, 1998 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A merged charge memory system is provided having an accessing arrangement wherein each of the word lines of the memory array is divided into a plurality of segments with cells associated only with a selected one or a portion of the segments being coupled at any particular time to bit driving and sensing means. Thus, only relatively few sense amplifiers compared with the number of bits per word of the array are required to handle all of the cells of the array. More particularly, in the merged charge memory system of the present invention, the flow of charges from charge source means is released only to the cells of the selected word segment or segments which are simultaneously coupled to bit driving and sensing means via associated bit/sense lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.